Machine-Level Programming
This is a quick look at Chapter 3 which builds on the
two pre-assembly labs.
The Basics
| 5 | Intel x86 |
| 6 | 2015 Intel i7 |
| 8 | 64-bit computers |
| 12 | Assembly/Machine code view |
| 15 | Assembly data types |
| 16 | Assembly operations |
| 23 | x86-64 integer registers (new) |
| 24 | IA32 integer registers (old) |
| 26 | instruction addressing (movq 1) |
| 27 | instruction addressing (movq 2) |
| 29 | swap examples |
| 35 | “simple” addressing |
| 36 | “complex” addressing |
| 39 | leaq (yikes!) |
| 40 | usual C/Java operations |
| 43 | an example (illustrated) |
Control
| 3 | condition codes (flags) |
| 4 | condition code — implicit |
| 4 | condition code — explicit |
| 7 | C/Java comparisions |
| 9 | returning more |
| 11 | jump instructions |
| 12 | difference example |
| 13 | did it in lab |
| 16 | conditional move |
| 22 | did it in lab |
| 27 | did it in lab |
| 32 | jump table for switch |
Procedures
| 2 | procedure mechanisms |
| 5 | push |
| 6 | pop |
| 8 | examples — leaf (green) and non-leaf (yellow) |
| 15 | passing data (cf the lab) |
| 18 | stack-based languages |
| 20 | stack frame |
| 25 | recursion example |
| 32 | linux stack frame |
| 33–38 | long example (think of Java bytecode in lab) |
| 41–42 | who saves the registers |
Data
| 3 | array allocation |
| 7 | array access |
| 8 | nested array allocation |
| 12 | nested array access |
| 16 | nested vs multi-level |
| 24 | structure allocation with alignment |
| 34 | XMM/SSE registers |