Reading
- Sections 6.8 and 7.9 of the textbook
- x86-64 Machine-Level Programming by Randy Bryant and David O’Hallaron
Reference
- Confusing variations
- Introductory to Assembly lecture notes from CMU
- AT&T vs Intel syntax
- Introduction to x64 Assembly by Intel
- Encoding real x86 Instructions
- segmentation
- Huge collections of documents
Some PowerPoint
Instructions, etc.
Registers
There is also an rip register that holds the instruction pointer
and a FLAGS register that contains condition codes.
Arithmetic and logical operators
Many C operators can be implemented in a single instruction, such as,
addS,
subS,
andS,
shlS,
shrS,
sarS,
orS,
xorS and
notS where S gives
the size of the operands.
There are multiply and divide instrutions,
imulS and idivS,
that require special handling because they store their
results in two registers.
The relational operators can be handled by two-instruction sequence.
The first instruction is a
cmpS and the second instruction is one of
sete,
setg,
setl,
setge or
setle.
The ! can also be handled with an sete.
All of the instructions mentioned above have two operands. At most one of the operands can specify a memory location.
Because the && and
|| operations can short circuit, they must
be implemented with conditional jumps.
There is also a movS for moving data.
(Linus
doesn’t like the cmov.)
Addressing modes
This is a hard one.
It all means that the x86 architecture can do the following in one
instruction
x = o->v[i]
where o is a pointer to a structure which contains
an array of integers.