module ancienttimes_top
     #(parameter DATA_WIDTH = 12)
      () ;

    bit clock ;
    logic reset, start, ready ;
    logic [DATA_WIDTH-1:0] p ;
    logic [DATA_WIDTH-1:0] q ;
    logic [2*DATA_WIDTH-1:0] result ;

    always #100 clock = ~clock ;

    ancienttimes   #(DATA_WIDTH) dut(clock, reset, start, p, q, result, ready) ;
    ancienttimes_tb #(DATA_WIDTH) tb(clock, reset, start, p, q, result, ready) ;

endmodule

