module mod3
      (input    logic                    clk,
       input    logic                    reset,
       input    logic                    inputb,
       output   logic                    outputb) ;

  logic [2:0] remainder ;
  logic [2:0] newremainder ;

  // State update
  always_ff @(posedge clk, reset)
    begin
      if (reset)
        remainder <= 0 ;
      else
        remainder <= newremainder ;
    end

  // next state
  always_comb
    begin
      if (2*remainder + inputb < 3 )
        newremainder <= 2*remainder + inputb ;
      else
        newremainder <= 2*remainder + inputb - 3 ;
    end

  // output
  assign outputb = remainder==0 ;
  
endmodule