CSCI 320 — x86 and its successors



Some PowerPoint

Instructions, etc.


x86_64 registers from Wikipedia Commons
There is also an rip register that holds the instruction pointer and a FLAGS register that contains condition codes.

Arithmetic and logical operators

Many C operators can be implemented in a single instruction, such as, addS, subS, andS, shlS, shrS, sarS, orS, xorS and notS where S gives the size of the operands.

There are multiply and divide instrutions, imulS and idivS, that require special handling because they store their results in two registers.

The relational operators can be handled by two-instruction sequence. The first instruction is a cmpS and the second instruction is one of sete, setg, setl, setge or setle. The ! can also be handled with an sete.

All of the instructions mentioned above have two operands. At most one of the operands can specify a memory location.

Because the && and || operations can short circuit, they must be implemented with conditional jumps.

There is also a movS for moving data. (Linus doesn’t like the cmov.)

Addressing modes

This is a hard one.

It all means that the x86 architecture can do the following in one instruction
    x = o->v[i]
where o is a pointer to a structure which contains an array of integers.

Branches and Loops

Calling conventions