- The usual slow algorithm for multiplication
- grid multiplication in hardware
- How about trading time for a little space? Multiply two 32-bit numbers in four runs through a 16-bit gate multiplier?
- Or use Karatsuba algorithm and only make three runs!
- VHDL Implementation of Non Restoring Division Algorithm Using High Speed Adder/Subtractor
- Anatomy of the Pentium Bug
- IEEE 754 Floating Point