Things to review for final two exams
- First exam
- The important things from CSCI 255 as in Homework 1
- Latches, flipflops, and timing diagrams as in Homework 2
- State machines as in Homework 3
- Understanding Verilog programs with state as in Homework 4, Homework 6, Thunderbird lights lab and Countdown lab
- Verilog testbench programs as in Homework 6, Thunderbird lights lab, and Countdown lab
- Principles of RISC processor design
- Instruction set design
- Addressing modes
- Designing for the programmer
- Features of SystemVerilog
- Types
- Operators
- Control flow
- Conditional execution
(
if
…else
) - Iterative execution (
for
&while
) - Grouping statements
(
begin
…end
)
- Conditional execution
(
- The
module
- Passing and receiving arguments
- Parameterization
- The weird stuff
- structural implementations
- behavioral implementations
- continuous assignment
- blocking vs non-block assignments
- excitation lists
always_ff
always_comb
- delay statment (
#100
)
- IEEE floating point as in Homework 5
- Cache design, fields and structures, as in Homework 9
Handy tables and reference sheets
Exams from previous semesters
It’s been 18 years since I taught CSCI 320. Even though most of you weren’t even in elementary school by then, you are welcome to look at my previous exams.
Exams from Spring 1996
- Midterm 1
- Midterm 2
- Final exam
Exams from Spring 1995
- Midterm 1
- Midterm 2
- Final exam
Exams from Spring 1994
- Midterm 1
- Midterm 2
- Final exam