CSCI 331 Reading about Memory Management

Intel IA-32 architecture

Download the IA-32 Intel Architecture Software Developer's Manual, Volume 3A: System Programming Guide, Part 1. Quickly read Chapter 3 of the manual. Be sure you understand the role of segment registers, segment descriptors, and segment descriptor tables. Also, carefully study the forms of linear address translation found in sections 3.8 and 3.9.

64bit Power PC architecture

Download the PowerPC Microprocessor Family: The Programming Environments Manual for 64-bit Microprocessors. Quickly read Chapter 7 of the manual. Study the memory segment model described in Section 7.4 to see how 64-bit effective addresses are transformed into 80-bit vitual addresses. The hashed page table translation mechanisms described in Section 7.5 are difficult to understand. However, learn to appreciate Figure 7-15.