Announcements

• Quiz 2 takehome

The Xilinx view

• Basic PLD Architecture

Complex Programmable Logic Devices

• What is a CPLD from Xilinx
• Xilinx XC9500

Field Programmable Gate Array

Abstract FPGA taken taken from Programmable Logic FAQ

• Internal array of programmable logic blocks
• Edge of programmable I/O blocks
• All surrounded by an interconnect
• Heavy use of placement and routing algorithms

Spartan-II Configurable Logic Block

• 4-input look-up tables -- 16-bit RAM
  • Additional RAM available on the FPGA
• arithmetic logic
• multiplexers
• D flip-flops

Some Xilinx documentation

• XC4000E and XC4000X Series Field Programmable Gate Arrays
• Spartan-IIE 1.8V FPGA Family: Functional Description
• Virtex-II brochure
• Virtex-II Pro Platform FPGAs: Functional Description