Spring 2002 CSCI 255 Lab 4

This lab is scheduled for 20 & 21, February.

Goals and Methods

For one last week we'll use the MultiMedia Logic simulator. We'll look at the implementation of sequential systems.

Downloading lab files

Two MultiMedia Logic design files, Experiment.lgi and Start.lgi, are needed for this lab. You can download these as either a Windows self-extracting exe file or a Zip file.

Download and continue.


Using MultiMedia Logic, open Experiment.lgi.
Lab 4 Experiment

At the top and bottom of this circuit, you see two rows of eight LED's. These LED's are connected to the outputs of a shift register. Go ahead and run the circuit and press the input switch on the left-hand side of the circuit. Notice how you create a pattern of binary bits that shift to the right with time.

This circuit looks for a pattern within its input bit stream. The center collection of three switches sets the pattern. For example, if you set the three switches to the bit sequence 010 (as shown in the above example), the circuit will output an 1 when the last three inputs bits are 010.

The shift register at the bottom of the circuit displays the last eight output bits. Notice that the matched three-bit sequences are allowed to overlap. That's why the input bit sequence 0101010 has three matches.

Play with Experiment.lgi until you understand the circuit and the meaning of matching.

Your job

Start by selecting a three-bit sequence, other than 000 or 111. Your task is to build a pattern matcher for your sequence. However, there are some rules.

  1. You must build the circuit as a finite state machine. That is, you must use the techniques of the 18 February lecture.
  2. You must use two D flip-flops to encode your states.
  3. You can not use any of the outputs of the two shift registers.
  4. You must direct the output of your circuit to the first flip-flop of the bottom shift register.


Be methodical.

Finite state machine diagram

Begin by drawing a finite state machine diagram. Your diagram should have three states, each encoding how "far" you are into the sequence of input bits. For example, one state is for when you've seen no bits of the sequence; another is for one bits; and the third for two bits.

Show your completed diagram to the lab instructor.

Finite state machine table

Write the finite state machine table in both a logical and binary format. You will need to select binary encodings of your states before writing the binary table. I suggest you use 00 for zero bits matched, 01 for one bit matched, and 10 for two bits matched.

Here's a state table for a circuit trying to match 000. We'll call the flip-flop state variables x and y, the input variable p, and the output variable o.

xyp DxDyo

Show your completed table to the lab instructor.

Combinational circuit

Using your table, design a combintation circuit to drive your circuit's output and flip-flops. You can implement your combination circuit with AND's and OR's, or you can use multiplexers.

We'll implement the 000 matcher with AND's and OR's using the following equations derived from our truth table.

Drawing the circuit

Open Start.lgi into the MultiMedia Logic simulator and wire in your combinational circuit. Test it when you are done.

An example

Here's the circuit that recognizes the bit string 000.
Zero Catcher

Instructor checkoff

When you are done, show the lab instructor your work.