15 March, 2000

Trying output flipflop

• a little diglog

Implementing flip-flops

• a little more diglog

• cross-coupled NAND gates (Fig 6.3a)
• clocked latches (Fig 6.4b)
• master-slave flip-flop (Fig 6.7a)
• edge-tigggered flip-flop (Fig 6.9a)

State machines