list p=12c671 include freg equ 70h ; this will be our sample register org 0h ; reset vector reset goto start org 5h start ; This is the start of the instruction sampler ; The ALU instructions ; Destination W bk000 clrw ; CLeaR W bk001 movlw H'AB' ; MOVe Literal to W bk002 addlw H'15' ; ADD Literal to W bk003 sublw H'D5' ; SUBtract from Literal value W bk004 iorlw H'F0' ; Inclusive OR Literal and W bk005 xorlw H'AA' ; eXclusive OR Literal and W ; Destination file register bk006 clrf freg ; CLeaR File register bk007 movwf freg ; MOVe W to File register bk008 bcf freg,2 ; Bit Clear in File register bk009 bsf freg,2 ; Bit Set in File register ; Destination file register or W bk010 incf freg,F ; INCrement File register bk011 incf freg,W bk012 decf freg,F ; DECrement File register bk013 decf freg,W bk014 comf freg,F ; COMplement File register bk015 comf freg,W bk016 swapf freg,F ; SWAP nibbles of File register bk017 swapf freg,W bk018 movf freg,F ; MOVe File register ; could change Z bit bk019 movf freg,W bk020 rlf freg,F ; Rotate Left File register bk021 rlf freg,W bk022 rrf freg,F ; Rotate Right File register bk023 rrf freg,W bk024 addwf freg,F ; Add W and File register bk025 addwf freg,W bk026 subwf freg,F ; Subtract W from File register bk027 subwf freg,W bk028 andwf freg,F ; AND W and File register bk029 andwf freg,W addlw 5 bk030 iorwf freg,F ; Inclusive OR W and File register bk031 iorwf freg,W bk032 xorwf freg,F ; eXclusive OR W and File register bk033 xorwf freg,W ; Now some skips movlw D'254' movwf freg incfsz freg,F ; INCrement File Skip if Zero movlw H'10' incfsz freg,F movlw H'20' ; skip me incfsz freg,F movlw H'30' incf freg,F decfsz freg,F ; DECrement File Skip if Zero movlw H'90' decfsz freg,F movlw H'80' ; skip me decfsz freg,F movlw H'70' movlw H'0F' movwf freg btfsc freg,0 ; Bit Test File Skip if Clear movlw H'10' btfsc freg,4 movlw H'20' ; skip me btfss freg,0 ; Bit Test File Skip if Set movlw H'30' ; skip me btfss freg,4 movlw H'40' ; Now looking at the STATUS register ; Bit 2 is the Z bit ; Bit 0 is the C bit ; Here's a way to test for equality with the Z bit movlw D'100' ; Set W and freg to be equal movwf freg subwf freg,W ; W = freg - W btfsc STATUS,Z movlw D'200' ; execute if equal movlw D'100' ; Set W and freg to be not equal movwf freg incf freg,F subwf freg,W ; W = freg - W btfsc STATUS,Z movlw D'200' ; execute if equal ; Here's a way to compare with the C bit ; Remember -- freg < W iff freg - W < 0 movlw D'100' ; Make freg < W movwf freg decf freg,F subwf freg,W ; compute freg - W btfsc STATUS,C movlw D'200' ; execute if < movlw D'100' ; Make freg > W movwf freg incf freg,F subwf freg,W ; compute freg - W btfsc STATUS,C movlw D'200' ; execute if < ; Using the indirect register movlw freg ; load W with "address" of freg movwf FSR movf INDF,W ; read from indirect register movlw D'75' movwf INDF ; store to indirect register ; A trick with the program counter movlw 4 addwf PCL,F movlw 2 goto tabend movlw 3 goto tabend movlw 5 goto tabend movlw 7 goto tabend tabend loop goto loop end