3 March Lab for CSCI 274

Lab goals

Some good news is that the diglog documentation is now stored on the web here at UNCA. While on a UNCA workstation use the URL

When on a web browser from home use

Of course, you can also press the appropriate item from the above lists. Using the file: will be faster here at UNCA and will not waste any room in your Netscape cache.

Starting off

Create a protected directory for this lab and copy in some files:

Configuring in diglog

Some of diglog's gates may be configured. Start up diglog on the shift40 ciruit, shown below,
40 bit shifter
that you just copied into your lab06 directory. Because this is a two "page" circuit, you do have to start diglog in an unusal way:

This circuit is a 40-bit shift register built from two 20-bit shift registers built, in turn, from five 4-bit shift registers. Type the numbers 1 and 2 into the main diglog window to switch between page 1 show above, which has the 40-bit shifter, and page 2 shown below,
20 bit shifter
which has the 20-bit shifter module

Now go back to page 1 and set a different frequency for the clock. This isn't easy, consult the on-line document Configuring Gates for a barely adequate tutorial. Experiment with changes in the clock frequency by modifying the number of "time steps". Try about both 100 (warp speed) and 10000 (yawn).

Debugging a sequential circuit

When you've had enough fun, exit from diglog and restart it on the 101011 circuit we designed in class. This is another two-pager:

The circuit is implemented with both a sequential circuit and two arrays of shift registers that hold the last twenty input and output bit streams.
FSM

For about ten to fifteen minutes, play with the 101011 circuit. Set the input bit stream to some interesting sequence of bits, such as 000110101101011101010101100, and verify that the circuit works correctly. If you'd like to use the 20-bit shifter in your Homework 3 solution copy the shift20.lgf into your homework directory with the command

and read the diglog documentation on Hierarchical Digital Simulation to make the connection.

Using SSI modules

Exit and then restart diglog with the file 4x16st.lgf.

4 by 16 encoder
Now figure out how to add a few wires and make a 16×4 encoder from the five 4×2 encoders found in the diglog file. Be sure to save your result when you're done!


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