# 10, 17, & 24 February Lab for CSCI 274

## Project goal

This project will be performed in four teams. Each team will be given two different segments in a seven segment display and asked to build a circuit that "turns" on those segments for four input bit values corresponding to the binary representations of 0 to 9. The logical specification of the circuit will be minimized with espresso, documented and simulated with diglog, and finally implemented using related SSI dips.

## Problem statement

First, think about the ubiquitous seven segment display that you see on your VCR, microwave, calculator, etc.

```      ---
|   |
|   |
---
|   |
**  |   |
**   ---
```

In this case, the dot at the bottom left of the above figure is the decimal point. In our problem it will be the eight output of the display.

In this problem description and in your problem solution we will call these eight outputs by the following three or two letter abreviations:

 trv top right vertical brv bottom right vertical tlv top left vertical blv bottom right vertical th top horizontal mh middle horizontal bh bottom horizontal dot decimal point

As previously mentioned, we are only interesting in inputs encoding the binary numbers from 0 to 9. This will give lots of don't care's in our espresso input. The outputs are to be one (lit) at the obvious times. Check your calculator if you have an questions. The decimal point, dot, is an error indicator. It is turned on only when the inputs encode and binary number greater than 9.

## Project teams

The four teams and their assigned outputs for this problem are

 Vance Bell Sam Elniff Christopher Rickman trv brv Zach Brown Michael French Jill Rochelle tlv brv Renee Cauble Robert Klein Kim Sparks th mh Tony Dills Kenny Nichols Jonathan Stanley bh dot

## Design protocol

You will design this problem in several stages. There will presentations of your partial results between some of those stages. It is extremely important that your work carefully. This is an assignment in which you really can burn your fingers.

### Stage 0 -- Getting ready

Pick one team member's directory to hold the project. Within that person's home directory create a subdirectory called ~/csci/274/lab03. This time you will protect the directory so that it can be written by anyone in this class. We are assuming that no one would dare modify any file belonging to another team.

• mkdir ~/csci/274/lab03
• chgrp csci274 ~/csci/274/lab03
• chmod g+w ~/csci/274/lab03
• cd ~/csci/274/lab03

### Stage 1 -- logical minimization

Define the Boolean functions that define your team's part of the problem and then use espresso to generate a minimal sum-of-products circuit for your problem. Store the input to espresso in ourfunc.in and the output in ourfunc.out.

### Stage 2 -- gate-level definition

Now use dislog to generate a gate-level design. Your design must use the 14-pimg CMOS SSI chips that are available to the class. These chips are described in the following table:

chip part
number
Boolean
function
number of
gates in DIP
74HCT04E inverter 6
74HCT00E 2-input NAND gate 4
74HCT10E 3-input NAND gate 3
74HCT20E 4-input NAND gate 2
74HCT30E 8-input NAND gate 1

At this time do not worry about the actual physical layout of the chip. Just use the appropriate NAND gates. However, it would be wise to keep packaging constraints in design. For example, a design with 5 2-input NAND gates and 2 3-input NAND gates requires three chips while a design with 4 2-input NAND gates and 3 3-input NAND gates requires only two.

To make it easier to test out your circuit start your design with the file ourcirc.lgf which may be found in the directory /usr/local/csci/274/lab03. In other words:

• cp /usr/local/csci/274/lab03/ourcirc.lgf .
• diglog ourcirc &

Be sure to document your design with the names of your team members and the Boolean functions you are solving.

### Stage 3 -- presentation of the design

Your team will now present its design to the class.

### Stage 4 -- SSI design

Get on the Internet and discover the pinouts for the chips you'll be using in your design. Hint: Search for pages containing strings such as "triple 3-input NAND gate". Use this information to Your instructor will also provide you with information about making inputs (switches) and outputs (LED).

### Stage 5 -- presentation of SSI design

Now your team will presents its SSI design. Transparencies will be provided for making overheads of your design.

### Stage 6 -- wiring switches, inverters, and LED's

On your prototype board, wire up your switches, connect the output of the switches to the invertors, and then connect the outputs of the switches to LEDs. Your instructor will describe the process. Do not apply power at this time.

### Stage 7 -- check of wiring

Each team must have its wiring checked out by at least one other team.

### Stage 8 -- first power-on

Load the batteries and power-up. Check at all four input swithes.

Is that smoke I smell?

### Stage 9 -- wiring entire circuit

Grab your NANDs and connect them up.

### Stage 10 -- check of ultimate wiring

Each team must have its wiring checked out by at least two other teams.

### Stage 11 -- ultimate power-on

Check out all sixteen possible input conditions. Those micro-switches are a pain to turn on and off. Read the textbook's description of Grey codes to save some button flipping.