CSCI 255, ENGR 274, ECE 212 -- 19 September, 2000


Glitches and hazards

an unwanted pulse at the output of a combinational logic network
circuit with the potential for a glitch

Types of hazards

When a single-bit of input changes, the following should not happen:
types of hazards

Trying out an example

Z = A C + B C'
logic circuit
timing diagram

Multilevel networks

With more levels for propagation, the detection of hazards becomes harder. If hazard-free design is required, it may be best to stick to two-levels.

A theory of hazard-free transformations

Practical stuff